Courses & Units

Multicore Architecture and Programming KIT308

Introduction

This unit exposes students to historical approaches to increased processor efficiency, such as pipelining and superscalar design, before concentrating on a key concept of modern computer architectures: multicores. Both CPU and GPU architectures will be explored in this context and likely future hardware trends will be discussed.

Students will learn the concepts and techniques for writing CPU multithreaded programs via the use of threading and synchronisation primitives as well as techniques for general-purpose GPU programming (GPGPU).

A major focus of this unit is real world optimisation. Students will be exposed to data-oriented design approaches, revisit the concepts of Big-O efficiency and OO, and will get practical experience at profiling code. Additionally, students will learn lower-level programming techniques such as single-instruction multiple-data (SIMD) instructions, branch removal, and loop unrolling.

Summary

Unit name	Multicore Architecture and Programming
Unit code	KIT308
Credit points	12.5
College/School	College of Sciences and Engineering School of Information and Communication Technology
Discipline	Information & Communication Technology
Coordinator	Doctor Ian Lewis
Available as an elective?	Yes
Delivered By	University of Tasmania
Level	Advanced

Availability

Location	Study period	Attendance options		Available to
Hobart	Semester 2	On-Campus		International	Domestic
Launceston	Semester 2	On-Campus		International	Domestic

Key

: On-campus
: Off-Campus
: International students
: Domestic students

Key Dates

Study Period	Start date	Census date	WW date	End date
Semester 2	11/7/2022	9/8/2022	29/8/2022	16/10/2022

* The Final WW Date is the final date from which you can withdraw from the unit without academic penalty, however you will still incur a financial liability (refer to How do I withdraw from a unit? for more information).

Unit census dates currently displaying for 2022 are indicative and subject to change. Finalised census dates for 2022 will be available from the 1st October 2021. Note census date cutoff is 11.59pm AEST (AEDT during October to March).

About Census Dates

Learning Outcomes

Explain the concepts of high-performance computer architecture and the impact of concepts on expected performance
Analyse a problem to define the requirements to target high-performance computer architecture
Develop and evaluate techniques for the creation of efficient multicore CPU and GPU programs by applying high performance programming principles and technical skills
Evaluate the performance and identify strengths and weaknesses of potential solutions targeting high-performance architecture

Fee Information

Field of Education	Commencing Student Contribution ^1,3	Grandfathered Student Contribution ^1,3	Approved Pathway Course Student Contribution ^2,3	Domestic Full Fee ⁴
029999	$1,002.00	$1,002.00	not applicable	$2,402.00

¹ Please refer to more information on student contribution amounts.
² Please refer to more information on eligibility and Approved Pathway courses.
³ Please refer to more information on eligibility for HECS-HELP.
⁴ Please refer to more information on eligibility for FEE-HELP.

If you have any questions in relation to the fees, please contact UConnect or more information is available on StudyAssist.

Please note: international students should refer to What is an indicative Fee? to get an indicative course cost.

Requisites

Prerequisites

KIT205 OR KIT206 OR KIT207 OR KIT208

Teaching

Teaching Pattern	Lectures: 2 - 4 hours / week Practicals: 2 hours / week
Assessment	Examination (40%)\|Multicore CPU Programming Assignment (15%)\|CPU Optimisation Programming Assignment (15%)\|GPU Programming Assignment (15%)\|In-Tutorial Assessment (15%)
Timetable	View the lecture timetable \| View the full unit timetable

Textbooks

Required	N/A
Recommended	N/A
Links	Booktopia textbook finder

The University reserves the right to amend or remove courses and unit availabilities, as appropriate.